Struct esp_ward::Spi

pub struct Spi<'d, T, M> { /* private fields */ }

SPI peripheral driver

Implementations

impl<'d, T> Spi<'d, T, FullDuplexMode>

where T: Instance,

pub fn new( spi: impl Peripheral<P = T> + 'd, frequency: Rate<u32, 1, 1>, mode: SpiMode, clocks: &Clocks<'_> ) -> Spi<'d, T, FullDuplexMode>

Constructs an SPI instance in 8bit dataframe mode.

All pins are optional. Setup these pins using with_pins or individual methods for each pin.

pub fn with_sck<SCK>( self, sck: impl Peripheral<P = SCK> + 'd ) -> Spi<'d, T, FullDuplexMode>

where SCK: OutputPin,

pub fn with_mosi<MOSI>( self, mosi: impl Peripheral<P = MOSI> + 'd ) -> Spi<'d, T, FullDuplexMode>

where MOSI: OutputPin,

pub fn with_miso<MISO>( self, miso: impl Peripheral<P = MISO> + 'd ) -> Spi<'d, T, FullDuplexMode>

where MISO: InputPin,

pub fn with_cs<CS>( self, cs: impl Peripheral<P = CS> + 'd ) -> Spi<'d, T, FullDuplexMode>

where CS: OutputPin,

pub fn with_pins<SCK, MOSI, MISO, CS>( self, sck: Option<impl Peripheral<P = SCK> + 'd>, mosi: Option<impl Peripheral<P = MOSI> + 'd>, miso: Option<impl Peripheral<P = MISO> + 'd>, cs: Option<impl Peripheral<P = CS> + 'd> ) -> Spi<'d, T, FullDuplexMode>

where SCK: OutputPin, MOSI: OutputPin, MISO: InputPin, CS: OutputPin,

Setup pins for this SPI instance.

All pins are optional. Pass [crate::gpio::NO_PIN] if you don’t need the given pin.

pub fn change_bus_frequency( &mut self, frequency: Rate<u32, 1, 1>, clocks: &Clocks<'_> )

impl<'d, T> Spi<'d, T, HalfDuplexMode>

where T: ExtendedInstance,

pub fn new_half_duplex( spi: impl Peripheral<P = T> + 'd, frequency: Rate<u32, 1, 1>, mode: SpiMode, clocks: &Clocks<'_> ) -> Spi<'d, T, HalfDuplexMode>

Constructs an SPI instance in half-duplex mode.

All pins are optional. Setup these pins using with_pins or individual methods for each pin.

pub fn with_sck<SCK>( self, sck: impl Peripheral<P = SCK> + 'd ) -> Spi<'d, T, HalfDuplexMode>

where SCK: OutputPin,

pub fn with_mosi<MOSI>( self, mosi: impl Peripheral<P = MOSI> + 'd ) -> Spi<'d, T, HalfDuplexMode>

where MOSI: OutputPin + InputPin,

pub fn with_miso<MISO>( self, miso: impl Peripheral<P = MISO> + 'd ) -> Spi<'d, T, HalfDuplexMode>

where MISO: OutputPin + InputPin,

pub fn with_sio2<SIO2>( self, sio2: impl Peripheral<P = SIO2> + 'd ) -> Spi<'d, T, HalfDuplexMode>

where SIO2: OutputPin + InputPin,

pub fn with_sio3<SIO3>( self, sio3: impl Peripheral<P = SIO3> + 'd ) -> Spi<'d, T, HalfDuplexMode>

where SIO3: OutputPin + InputPin,

pub fn with_cs<CS>( self, cs: impl Peripheral<P = CS> + 'd ) -> Spi<'d, T, HalfDuplexMode>

where CS: OutputPin,

pub fn with_pins<SCK, MOSI, MISO, SIO2, SIO3, CS>( self, sck: Option<impl Peripheral<P = SCK> + 'd>, mosi: Option<impl Peripheral<P = MOSI> + 'd>, miso: Option<impl Peripheral<P = MISO> + 'd>, sio2: Option<impl Peripheral<P = SIO2> + 'd>, sio3: Option<impl Peripheral<P = SIO3> + 'd>, cs: Option<impl Peripheral<P = CS> + 'd> ) -> Spi<'d, T, HalfDuplexMode>

where SCK: OutputPin, MOSI: OutputPin + InputPin, MISO: OutputPin + InputPin, SIO2: OutputPin + InputPin, SIO3: OutputPin + InputPin, CS: OutputPin,

Setup pins for this SPI instance.

All pins are optional. Pass [crate::gpio::NO_PIN] if you don’t need the given pin.

pub fn change_bus_frequency( &mut self, frequency: Rate<u32, 1, 1>, clocks: &Clocks<'_> )

Trait Implementations

impl<T, M> ErrorType for Spi<'_, T, M>

type Error = Error

Error type.

impl<T, M> FullDuplex for Spi<'_, T, M>

where T: Instance, M: IsFullDuplex,

fn read(&mut self) -> Result<u8, Error<<Spi<'_, T, M> as ErrorType>::Error>>

Reads the word stored in the shift register

fn write( &mut self, word: u8 ) -> Result<(), Error<<Spi<'_, T, M> as ErrorType>::Error>>

Writes a word to the slave

impl<T, M> HalfDuplexReadWrite for Spi<'_, T, M>

where T: Instance, M: IsHalfDuplex,

type Error = Error

fn read( &mut self, data_mode: SpiDataMode, cmd: Command, address: Address, dummy: u8, buffer: &mut [u8] ) -> Result<(), <Spi<'_, T, M> as HalfDuplexReadWrite>::Error>

Half-duplex read.

fn write( &mut self, data_mode: SpiDataMode, cmd: Command, address: Address, dummy: u8, buffer: &[u8] ) -> Result<(), <Spi<'_, T, M> as HalfDuplexReadWrite>::Error>

Half-duplex write.

impl<T, M> SpiBus for Spi<'_, T, M>

where T: Instance, M: IsFullDuplex,

fn read( &mut self, words: &mut [u8] ) -> Result<(), <Spi<'_, T, M> as ErrorType>::Error>

Read words from the slave.

fn write( &mut self, words: &[u8] ) -> Result<(), <Spi<'_, T, M> as ErrorType>::Error>

Write words to the slave, ignoring all the incoming words.

fn transfer( &mut self, read: &mut [u8], write: &[u8] ) -> Result<(), <Spi<'_, T, M> as ErrorType>::Error>

Write and read simultaneously. write is written to the slave on MOSI and words received on MISO are stored in read.

fn transfer_in_place( &mut self, words: &mut [u8] ) -> Result<(), <Spi<'_, T, M> as ErrorType>::Error>

Write and read simultaneously. The contents of words are written to the slave, and the received words are stored into the same words buffer, overwriting it.

fn flush(&mut self) -> Result<(), <Spi<'_, T, M> as ErrorType>::Error>

Wait until all operations have completed and the bus is idle.

impl<T, M> Transfer<u8> for Spi<'_, T, M>

where T: Instance, M: IsFullDuplex,

type Error = Error

Error type

fn transfer<'w>( &mut self, words: &'w mut [u8] ) -> Result<&'w [u8], <Spi<'_, T, M> as Transfer<u8>>::Error>

Sends words to the slave. Returns the words received from the slave

impl<T, M> Write<u8> for Spi<'_, T, M>

where T: Instance, M: IsFullDuplex,

type Error = Error

Error type

fn write( &mut self, words: &[u8] ) -> Result<(), <Spi<'_, T, M> as Write<u8>>::Error>

Sends words to the slave, ignoring all the incoming words

impl<T, M> FullDuplex<u8> for Spi<'_, T, M>

where T: Instance, M: IsFullDuplex,

type Error = Error

An enumeration of SPI errors

fn read( &mut self ) -> Result<u8, Error<<Spi<'_, T, M> as FullDuplex<u8>>::Error>>

Reads the word stored in the shift register

fn send( &mut self, word: u8 ) -> Result<(), Error<<Spi<'_, T, M> as FullDuplex<u8>>::Error>>

Sends a word to the slave

impl<'d, C, M> WithDmaSpi2<'d, C, M> for Spi<'d, SPI2, M>

where C: ChannelTypes, <C as ChannelTypes>::P: SpiPeripheral + Spi2Peripheral, M: DuplexMode,

fn with_dma(self, channel: Channel<'d, C>) -> SpiDma<'d, SPI2, C, M>